100Gbps Coherent Receiver Evaluation Kit, ICR-100-EVK, Fujitsu FIM24706, EVB


DP-QPSK/DP-BPSK/QPSK/BPSK 40 / 100 Gbps Coherent Receiver Evaluation Kit, ICR-100-EVK

General Description

The ICR-100-EVK is an O/E evaluation kit designed to convert QPSK /PM-QPSK/ QAM (16QAM, 64QAM) / BPSK optical data to differential electrical signals.  It consists of coherent receiver (Fujitsu FIM24706), daughter adapter board, and mother power and control board. The ICR-100-EVK offers several user-adjustable characteristics such as RF gain, PD bias, and mode of operation, Auto Gain Control (AGC) or Manual Gain Control (MGC) and is ideally suited for a variety of applications. Additionally, the output voltage swing adjustment is available.

General Description

Key Features

  • Four well-matched Linear Balanced PIN/TIA Photo-receivers.
  • Integrated Dual-Polarization 90 Degree Optical Hybrid.
  • Two modes of operation: Automatic and Manual Gain Control.
  • Independently adjustable differential gain, and RF output voltage swing.
  • Bias voltage independently tunable for all photodiodes.
  • Easy-to-use lab evaluation kit, with graphic user interface on Windows operating system.
  • Single DC-12V power supply, and virtual USB control port.

ICR Block Diagram

ICR Block Diagram

Typical Applications

  • Dual Polarization I/Q Transmitter Characterization, QPSK /PM-QPSK/ QAM (16QAM, 64QAM).
  •  Intradyne Link Testing.
  • High Speed ADC and DSP Development.

Operating Condition

Parameter Symbol Min Typical Max Units
Wavelength                         C-Band 1527 1567 nm
Symbol Rate 32 GBaud
Optical Signal Input Power PSi -18 -10 0 dBm
Local Oscillator Input Power PLo +3 +13 dBm
Photodiode Supply Voltage

(Signal and Monitor)

Vpd 4.75 5 5.25 V
Amplifier Supply Voltage Vcc 3.135 3.3 3.465 V
Gain Adjustment Voltage GC 0 Vcc V
Output Voltage Swing Adjustment OA 0 Vcc V
ICR Power Consumption 1.3 W

Optical and Electric Specifications

Parameter Symbol Min Typical Max Units
Baud Rate 32 Gbaud
Output Swing Range (1*)

(Differential Peak to Peak, AC Coupled)

300 900 mVppd
Total Harmonic Distortion THD 5 %
Common Mode Rejection Ratio CMRR
DC, Signal to I and Q -20 dBe
DC, LO to I and Q -12 dBe
22GHz, Signal to I and Q -16 dBe
22GHz, LO to I and Q -10 dBe
Small Signal Bandwidth (-3dB) 22 GHz
Low Frequency Cut-off (AC Coupled) 100 kHz
Phase Error(Between Xi, Xq or Yi, Yq) -5 +5 Deg.
Optical Reflectance (Signal and LO) -27 dB
Responsivity (2*) Rsig 0.045 A/W
Rmon 0.005 0.05 A/W
Responsivity Difference(Signal: P, N) 1 dB
Photodiode Dark Current Dsig 1 nA
Dmon 0.1 nA

Note 1: The ICR-100-EVK has two modes of operation, Manual Gain Control and AGC Automatic Gain Control.  The mode of operation is set using the graphic user interface.  Output swing can be controlled by AGC or MGC between the min. value and the max. value. This does not mean output swing can be controlled whole range from the min. value to the max. value.

Note 2: LO power should be properly set by user to obtain desired output swing. For responsivity from signal and LO port, linearly polarized optical input is aligned 45 degree to PBS and slow axis of PMF, respectively.

Absolute Maximum Ratings

Parameter Min Max Units
Operating Temperature +10 +40                         °C
Storage Temperature 0 +60                         °C
Total Optical Input Power Damage (Signal + LO) +17                         dBm
Fiber Bend Radius 15                         mm
Electro Static Discharge(Human Body Model) -250 +250                         V

Manual Gain Control Adjust

The ICR-100-EVK gain control is set using the graphic user interface and varies the transimpedance gain from a minimum of 250 Ohms to a maximum of 3200 Ohms by setting gain control voltage.

Automatic Gain Control

The ICR-100-EVK AGC (Automatic Gain Control) mode will maintain a constant differential output voltage swing of about 500mVpp per balanced receiver by default.

Theory of Operation

Theory of Operation

The above figure shows the received signal as DP-QPSK input. The data channels I and Q are encoded into one of four optical phases, and two orthognal polarizations to form a composite of XI, XQ, YI, and YQ signals. A polarization beam splitter separates the two polarization states into the X and Y channels. I and Q are established relative to the phase of the LO where the relationship of the phase of the Q channel to the LO is advanced or delayed 90 degrees as compared to the I channel. The XI voltage increases as the I and the LO phase form constructive interference. This is also true for XQ, YI, and YQ. Using this principle, the LO phase provides the reference to demodulate the I and Q data channels.

The ICR-100-EVK architecture is not limited to DP-QPSK and may be used with higher modulation formats such as dual polarization 16-QAM.

Advanced Q

Figure above shows I/Q phase relation when optical frequency of the signal is higher than that of the local oscillator.

Handling Precaution

  • When handling the evaluation kit, hold the edge of base board, neither the fiber, nor the PCB.
  • The attached fiber should be handled very carefully. Do not twist nor exceed a pull force greater than 500gf. A handling radius should not be less than 15mm.
  • This receiver is susceptible to damage as a result of electrostatic discharge (ESD). Appropriate handling precautions against ESD must be taken during handling and testing.
  • The receiver includes precision optics. If package of the receiver is deformed by excess load, the receiver may be degraded in its characteristics or damaged.
  • It is strongly required that user must follow the steps to setup the evaluation system, power on the kit first -> then power on PD -> power on TIA -> inject Sig and LO.
  • It is strongly required that user must follow the steps to shut down the evaluation system, first halt and detach Sig and LO -> power off TIA -> then power off PD -> power off the kit.

Mechanical Specifications

Parameter Specification Units
Mechanical Dimensions of ICR 40x27x6 mm
Mechanical Dimensions of Evaluation Board Adapter Board: 108x108x50(Shield)

Power and Control Board: 150x100x20

mm
Fiber Type Sig: SMF, OD=0.9mm, Yellow

LO: PMF, OD=0.4mm, Transparent

Fiber Length 1000~1300 mm
Optical Connector and  Polishing Sig and LO: LC/PC
RF Connector Type GPPO (mini SMP) Male

Note 1: Polarization of the LO input to be aligned to the slow-axis. The connector key is adjusted to the direction within +/-5degree from slow-axis.

Connect Key RF Port

Electrical Output

GPPO (mini SMP) Male

Power Supply

DC 12V, 1A

User Interface

UI

Typical Frequency Response Performance

Listed below is the principle diagram of intradyne technology to test the frequency response of the coherent receiver.  Two fine wavelength resolution tunable lasers inject into the ICR and after the interference, demodulation, OE conversion and amplification, 4 sine waveforms are captured and displaying on the oscilloscope. The amplitude of the waveforms indicates the response of the coherent receiver.

Intradyne Frequency Responce

Waveform 1: Frequency Response at 800MHz

waveform1

Waveform 2: Frequency Response at 18GHz

waveform2

ICR-100-EVK with a Storage Oscilloscope for Intradyne Transmission

This test setup uses an intradyne technique to measure a transmission link. Here an LO is input to the ICR-100-EVK and mixes with the Signal to produce electrical data at an intermediate frequency. The storage oscilloscope captures X polarization I and Q data on channels 1 and 2 and Y polarization I and Q data on channels 3 and 4. After data capture the scope transfers the data to a computer for off-line processing.

Storage Oscilloscope for Intradyne Transmission

Testing ADC+DSP for Intradyne Coherent Receiver

This test setup uses an intradyne technique to develop ADC and DSP technologies. Here an LO is input to the ICR-100-EVK and mixes with the Signal to produce electrical data at an intermediate frequency. The ICR-100-EVK outputs differential X polarization I and Q data, and differential Y polarization I and Q data to the ADC. The ADC data is then operated on by the DSP circuit. The ICR-100-EVK’s AGC mode and variable bandwidth settings are useful when developing ADC and DSP circuits to comply with the OIF Implementation Agreement for Integrated Intradyne Coherent Receivers.

Testing ADC+DSP for Intradyne Coherent Receive

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